as of April 21, 2025
*Some of the program or time schedule can be changed.
Time | June 2 (MON) |
---|---|
10:30~10:40 | Welcome & Introduction |
10:40~11:25 | Dr. Jiho Kang, SK-hynix "Semiconductor technology trends to overcome the integration limitations for future AI memory devices" |
11:25~12:10 | Prof. Tetsu Tanaka, Tohoku University "Advanced 3DIC/TSV technologies for neuron-machine interface devices" |
12:10~13:40 | Lunch |
13:40~14:25 | Dr. Kimin Jun, Samsung Electronics Co., Ltd. "BSPDN: an interconnect breakthrough powered by bonding technology" |
14:25~15:10 | Prof. Jyehong Chen, National Yang Ming Chiao Tung University "The future system prospects of electrical and optical interconnects and their role in AI data centers" |
15:10~15:40 | Coffee Break |
15:40~16:25 | Prof. Yung-Jr Hung, National Sun Yat-sen University "Platform and devices for co-packaged optics" |
16:25~17:10 | CTO. Shu-Jen Han, Quantum Device "Building a quantum computer - from device to system" |
Time | June 3 (TUE) |
---|---|
08:20~08:40 | [Session 1 - Ceonference Kick off and Awards Ceremony] |
08:40~09:30 | [Keynote Talk I] Dr. Jong Myeong Lee, Samsung Electronics Co., Ltd. "Innovative interconnect technology of future semiconductor" |
09:30~09:50 | Coffee Break |
09:50~12:00 | [Session 2 - Advanced Interconnects I] |
09:50~10:15 | Invited Dr. Daniel C. Edelstein, IBM "Innovations enabling the continued extendibility of Cu and Post-Cu damascene BEOL technology" |
10:15~10:40 | Invited Dr. Giulio Marti, IMEC "Advancing pillar-based FSAV integration of Ru interconnect to enlarge the process window and enable multi-layers of high-aspect ratio" |
10:40~11:00 | Dr. Assawer Soussou, Lam Research "Via resistance optimization at advanced sub-2nm nodes" |
11:00~11:20 | Mr. Takumi Nishinobo, Tokyo Electron Limited "Post-Cu CMP leakage suppression using sequential small molecular inhibitor treatment" |
11:20~11:40 | Dr. Kwang Seok Lee, Samsung Electronics Co., Ltd. "Process integration of high-density low-k dielectric material for enhanced plasma-induced damage resistant performance" |
11:40~12:00 | Dr. Cassie Sheng, IMEC "Addressing integration challenges in direct backside contact of CFET" |
12:00~13:10 | Lunch |
13:10~15:05 | [Session 3 - 3D Packaging & Hybrid Bonding I] |
13:10~13:35 | Invited Dr. Juheon Yang, SK hynix "Metal interconnection of high bandwidth memory in wafer level packaging" |
13:35~13:55 | Mr. Sarabjot Singh, IBM "Predictive simulations and experimental study of AlN bonding for better thermal dissipation in BSPDN" |
13:55~14:15 | Mr. Abhaysinha Patil, IMEC "Evaluation of warpage tolerance of 100 µm dies to achieve void-free bond and 100% assembly yield" |
14:15~14:30 | Mr. Chun-Che Cheng, National Yang Ming Chiao Tung University "Thermal performance analysis of BSPDN and FSPDN from chip to package level" |
14:30~14:45 | Mr. Hayato Kitagawa, Yokohama National University "Novel bonding interfacial material for carrier wafer of BSPDN & reconstructed D2W" |
14:45~15:05 | Mr. Alex Hsu, ASML "Optimizing direct die-to-wafer hybrid bonding: the role of scanner precorrection in achieving fine overlay performance" |
15:05~15:25 | Coffee Break |
15:25~17:35 | [Session 4 - Materials and Unit Process I] |
15:25~15:50 | Invited Dr. Jongmin Baek, Samsung Electronics Co., Ltd. "Selective deposition in interconnect: enabling high-performance and scalable integration" |
15:50~16:10 | Dr. Rutvik Mehta, Veeco Instruments Inc. "Ion beam deposition of ruthenium for interconnect applications in a direct metal etch approach" |
16:10~16:30 | Dr. Fulya Ulu Okudur, IMEC "UV surface pre-treatment and wet cleaning of Ruthenium MP18 semi-damascene structures" |
16:30~16:45 | Mr. Yeongjun Lim, KAIST "Optimizing grain boundary doping in molybdenum interconnects: a first-principle study" |
16:45~17:00 | Ms. Min-Ji Ha, Hanyang University "Effect of H2/N2 ratio on molybdenum nitride thin films deposited by plasma-enhanced atomic layer deposition" |
17:00~17:15 | Ms. Chaehyun Park, UNIST "Atomic layer deposited highly conductive niobium carbide thin films as next-generation diffusion barriers for Cu and Ru interconnects" |
17:15~17:35 | Dr. Geun-Tae Yun, Samsung Electronics Co., Ltd. "Developmnet of a robust ultra-low-k film and carbon replenishment for reliable BEOL interconnect" |
Time | June 4 (WED) |
---|---|
08:30~09:20 | [Session 5 - Keynote Talk Ⅱ] CTO. Paul Lindner, EV Group "The role of wafer bonding in next generation interconnect scaling" |
09:20~10:45 | [Session 6 - Advanced Interconnects II] |
09:20~09:45 | Invited Dr. Kyoung-Woo Lee, Samsung Electronics Co., Ltd. "Integration of advanced backside power delivery network for 2nm node technology" |
09:45~10:05 | Dr. Gilles Delie, IMEC "MP16/18 integration in Ru semi-damascene using SiN-based core for spacer-is-dielectric SADP" |
10:05~10:25 | Mr. Christopher Penny, IBM "First demonstration of 16nm pitch subtractive Ru interconnects for advanced technology nodes" |
10:25~10:45 | Dr. Stéphane Larivière, IMEC "Electrical test demonstration for 0.55 NA EUV single patterning damascene process" |
10:45~11:05 | Coffee Break |
11:05~12:30 | [Session 7 - Reliability and Characterization] |
11:05~11:30 | Invited Dr. Bettina Wehring, Fraunhofer IPMS "Advanced XPS depth profiling analysis of metal alloys as diffusion barriers for Cu interconnects" |
11:30~11:50 | Ms. Youqi Ding, IMEC "Quantifying the impact of thermal gradients on electromigration lifetimes in 90 nm CD Cu Lines" |
11:50~12:10 | Mr. Ahmed Saleh, IMEC "AI-driven variability-aware physics-based EM simulation framework for Jmax estimation" |
12:10~12:30 | Dr. Jit Dutta, University of California San Diego "Nanoscale assesment of capping layers to prevent surface oxidation of W interconnect plugs" |
12:30~13:40 | Lunch |
13:40~15:35 | [Session 8 - Materials and Unit Process II] |
13:40~14:05 | Invited Prof. Il-Kwon Oh, Ajou University "Unconventional reduction in resistivity of atomic scale topological semimetal of NbP and TaP" |
14:05~14:25 | Dr. Takayuki Harada, National Institute for Materials Science "Low-resistivity PdCoO2 thin films with rigid interlayer bonds for advanced interconnects" |
14:25~14:45 | Dr. Keun Wook Shin, Samsung Advanced Institute of Technology "Epitaxial growth and resistivity characterization of Rhodium thin films for advanced interconnect applications" |
14:45~15:00 | Mr. Masaya Iwabuchi, Tohoku University "Evaluation of intermetallic compounds selected From DFT database" |
15:00~15:20 | Dr. Sunyoung Noh, Samsung Electronics Co., Ltd. "The intermixing study of Cu/Ru interface in dual-damascene scheme for advanced interconnect" |
15:20~15:35 | Ms. Jeongha Kim, UNIST "Improved properties of atomic layer deposited Ru films by providing additional reactant for Cu alternative nanoscale interconnects" |
15:35~15:55 | Coffee Break |
15:55~17:20 | [Session 9 - Advanced Interconnects III] |
15:55~16:20 | Invited Dr. Koichi Motoyama, IBM "Reliability and performance enhancement for fully subtractive Ru Topvia interconnects" |
16:20~16:40 | Dr. Peng Zhao, IMEC "Integration of through-dielectric-via on buried power rail and slit nano through-silicon-via for enhanced backside connectivity" |
16:40~17:00 | Dr. Taeyeon Oh, Lam Research "Pathfinding for Molybdenum Hybrid Metallization" |
17:00~17:20 | Mr. Anshul Gupta, IMEC "Two-metal-level semi-damascene interconnect with variable width bottom metal at metal pitch 18-26 nm and aspect ratio 4-6 routed using fully self-aligned via" |
17:20~18:30 | Poster Session |
18:30~20:30 | Banquet |
Time | June 5 (THU) |
---|---|
08:30~09:20 | [Session 10 - Keynote Talk Ⅲ] VP. Kaihan Ashtiani, Lam Research "Interconnect scaling – materials, processes and integration challenges and solutions" |
09:20~10:30 | [Session 11 - Advanced Interconnects IV] |
09:20~09:45 | Invited Dr. Fabrice Nemouchi, CEA Leti "Towards 300mm superconducting devices : from FDSOI transistors to gatemon qubits" |
09:45~10:10 | Invited Mr. Blake Hodges, IMEC "Optimized two metal level semi-damascene interconnects for superconducting digital logic" |
10:10~10:30 | Dr. David Mandia, Lam Research "Selective and superconformal Mo growth strategies for advanced metallization" |
10:30~10:50 | Coffee Break |
10:50~12:20 | [Session 12 - BEOL Integration and Characterization] |
10:50~11:15 | Invited Dr. Larissa Juschkin, KLA Corporation "High speed optical inspection of wafers" |
11:15~11:40 | Invited Dr. Nicolas Posseme, CEA-Leti "Benefit of post etch treatment for defectivity improvement in the BEOL" |
11:40~12:00 | Dr. Yannick Hermans, IMEC "Robust overlay control in 2-level semi-damascene" |
12:00~12:20 | Prof. Houman Zahedmanesh, IMEC "Thermally-induced morphology changes in subtractive Ru lines and their mitigation" |
12:20~13:30 | Lunch |
13:30~14:45 | [Session 13 - 3D Packaging & Hybrid Bonding II] |
13:30~13:50 | Mr. Yinan Lu, Applied Materials "Hybrid bonding: die to wafer dynamic process investigation through advanced 3D modeling" |
13:50~14:10 | Mr. SeokHo Na, Amkor Technology "Advanced interconnection technology overview" |
14:10~14:30 | Dr. Takeki Ninomiya, The University of Tokyo "Aluminum nitride interlayer dielectric integration for effective heat dissipation of 3D-IC" |
14:30~14:45 | Ms. Jia-Rui Lin, National Yang Ming Chiao Tung University "Low-temperature epoxy-based Cu/Polymer hybrid bonding for 3D IC packaging with optimized CMP" |
14:45~15:00 | Closing Ceremony |